Advanced Course:
"Design of Distributed and Multi-Core
Systems & Software"
* An Advanced Course for Experienced Real-Time Embedded System Designers and Software Developers
* How to Structure Embedded Systems and Application Software for Distributed and Multicore Environments
* 2- Day Intensive Class (lectures, discussions, design examples, exercises)
COURSE OVERVIEW
This course examines the high-level design of embedded systems and software for distributed and multicore
processing environments.
It begins with a discussion of the basic concepts of distributed systems and multi-core systems-on-a-chip ("SoC's").
This is followed by an in-depth study of distributed control systems design, including examples from automotive
applications and home automation. Guidelines are given for the design of large and complex distributed systems, with
examples from the worlds of transportation and high-performance communication systems. The course then shifts
focus to the use of multi-core SoC's in embedded systems designs. This includes detailed study of both symmetric and
asymmetric multiprocessing -- from the perspectives of hardware, software and operating systems support. It delves
deeply into operating systems for multi-core SoC's, multi-core software architectural design, and special memory issues
in multi-core software.
This course is far from a general course about system or software design theory, but rather it is highly focused on the
practical design of multi-processor embedded systems and software that will operate in distributed and multicore
processing configurations.
WHO SHOULD ATTEND ?
This course is intended for practicing real-time and embedded systems software system architects, project managers
and technical consultants who will have responsibility for designing, structuring and implementing the software for
real-time and embedded multiprocessing systems that will operate in distributed and/or multicore processing
configurations.
Course participants are expected to have background in embedded and real-time software design for single-CPU
systems. [This knowledge can be gained by attending a prerequisite embedded software design course such as
"Architectural Design of Real-Time Software".]
COURSE OBJECTIVES
The primary goal of this course is to give the participant the skills necessary to design software for real-time and
embedded multiprocessing systems that will operate in distributed and/or multicore processing configurations. This is
a very practical, results-oriented course that will provide knowledge and skills that can be applied immediately.
COURSE CONTENTS
Definitions and Background
Distributed Systems
Multi-Core Systems-on-a-Chip
Differences: Multi-Core vs. Distributed
Distributed Control Design
Loosely-Coupled Distributed Systems
Distributing a Control Capability
Examples: On-Board Automotive Networks
System Partitioning Guidelines
Exercise: Body Electronics Control for Airport Train
Designing Complex Distributed Systems
Identifying Sub-systems: Sub-system Structuring Criteria
Distributed Applications: Logical vs. Physical Nodes
Design Models for Distributed Applications
Exercise: Multiprocessing System Performance Calculations
Decomposition of Sub-systems into Software Tasks (Optional)
Message Communication Performance Modeling (Optional)
Case Study: High-Performance IP Communication Router Design
Multi-Core Systems-on-a-Chip (SoC's)
Amdahl's Law
Fine-Grained vs. Coarse-Grained Parallelism
Symmetric vs. Asymmetric Multiprocessing
Operating Systems for Embedded Multiprocessing
Symmetric Multiprocessing ("SMP")
Organizing Software for SMP
Operating Systems Support for SMP
Spinlocks
Load Balancing vs. Processor Affinity
Extended Example: VxWorks RTOS for SMP
Hidden Dangers in Designing Software for SMP
OpenMP and MPI
Read-Write Locks
Lock-Free Programming
Design Patterns for SMP MultiCore Software
Asymmetric Multiprocessing ("AMP")
When to Use AMP
Operating Systems for AMP
Moving from Uni-Processing to AMP
Hypervisors
Design Patterns for AMP Multicore Software
Memory Issues in MultiCore Software
Working with Cache Memory
Memory Contention
"False Sharing"
Memory Consistency and Inconsistency
Memory Barriers for MultiCore Software
Final Examination.
INSTRUCTOR: Dr. David Kalinsky
© Copyright 2011, D. Kalinsky Associates, All Rights Reserved. This page Updated March 25, 2011
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